q?v~zy??q?v?_ra]?????qcabeq HFC2N60U 2 1 3 bv dss = 600 v r ds(on) typ =
i d =2a ? originative new design ? superior avalanche rugged technology ? robust gate oxide technology ? very low intrinsic capacitances ? excellent switching characteristics ? unrivalled gate charge : 5.5 nc (typ.) ? extended safe operating area ? lower r ds(on) :4
7 \ s # 9 gs =10v ? 100% avalanche tested features absolute maximum ratings t c =25 e unless otherwise specified HFC2N60U 600v n-channel mosfet symbol parameter value units v dss drain-source voltage 600 v i d drain current ? continuous (t c = 25 e ) 2.0 * a drain current ? continuous (t c = 100 e ) 1.3 * a i dm drain current ? pulsed (note 1) 8.0 * a v gs gate-source voltage 30 v e as single pulsed avalanche energy (note 2) 116 mj i ar avalanche current (note 1) 2.0 a e ar repetitive avalanche energy (note 1) 5.4 mj dv/dt peak diode recovery dv/dt (note 3) 4.5 v/ns p d power dissipation (t c = 25 e ) - derate above 25 e 10 w 12.5 w/ e t j , t stg operating and storage temperature range -55 to +150 e t l maximum lead temperature for soldering purposes, 1/8? from case for 5 seconds 300 e 1.gate 2. drain 3. source thermal resistance characteristics symbol parameter typ. max. units r jc junction-to-case -- 13 e /w r ja junction-to-ambient -- 62.5 november 2014 to-126 * drain current limited by junction temperature
q?v~zy??q?v?_ra]?????qcabeq HFC2N60U notes ; 1. repetitive rating : pulse width limited by maximum junction temperature 2. l=53mh, i as =2a, v dd =50v, r g =25 : , starting t j =25 q c 3. i sd ? $ di/dt ? $ v , v dd ? % 9 dss , starting t j =25 q c 4. pulse test : pulse width ? v ' x w \ & \ f o h ? 5. essentially independent of operating temperature electrical characteristics t j =25 q c unless otherwise specified symbol parameter test conditions min typ max units i s continuous source-drain diode forward current -- -- 2.0 a i sm pulsed source-drain diode forward current -- -- 8.0 v sd source-drain diode forward voltage i s = 2.0 a, v gs = 0 v -- -- 1.4 v trr reverse recovery time i s = 2.0 a, v gs = 0 v di f /dt = 100 a/ v (note 4) -- 206 -- qrr reverse recovery charge -- 0.76 -- & on characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = 250 3 600 -- -- v ? bv dss / ? t j breakdown voltage temperature coefficient i d = 250 3 , referenced to 25 e -- 0.6 -- v/ e i dss zero gate voltage drain current v ds = 600 v, v gs = 0 v -- -- 1 3 v ds = 480 v, t c = 125 e -- -- 10 3 i gss gate-body leakage current v gs = 30 v, v ds = 0 v -- -- 100 2 off characteristics c iss input capacitance v ds = 25 v, v gs = 0 v, f = 1.0 mhz -- 320 420 ? c oss output capacitance -- 38 50 ? c rss reverse transfer capacitance -- 6.5 8.5 ? dynamic characteristics t d(on) turn-on time v ds = 300 v, i d = 2.0 a, r g = 25 ? (note 4,5) -- 20 50 t r turn-on rise time -- 20 50 t d(off) turn-off delay time -- 30 70 t f turn-off fall time -- 20 50 q g total gate charge v ds = 480 v, i d = 2.0 a, v gs = 10 v (note 4,5) -- 5.5 7.5 nc q gs gate-source charge -- 1.8 -- nc q gd gate-drain charge -- 3.5 -- nc switching characteristics source-drain diode maximum ratings and characteristics v gs gate threshold voltage v ds = v gs , i d = 250 3 2.5 -- 4.5 v r ds(on) static drain-source on-resistance v gs = 10 v, i d = 1.0 a -- 4.0 5.0 ?
q?v~zy??q?v?_ra]?????qcabeq HFC2N60U typical characteristics figure 1. on region characteristics figure 2. transfer characteristics figure 3. on resistance variation vs drain current and gate voltage figure 4. body diode forward voltage variation with source current and temperature figure 5. capacitance characteristics figur e 6. gate charge characteristics 0123456 0 2 4 6 8 10 12 v ds = 300v v ds = 120v v ds = 480v
note : i d = 2.0a v gs , gate-source voltage [v] q g , total gate charge [nc] 10 -1 10 1 v gs top : 15.0 v 10.0 v 8.0 v 7.0 v 6.5 v 6.0 v 5.5 v bottom : 5.0 v * notes : 1. 300us pulse test 2. t c = 25 o c i d , drain current [a] v ds , drain-source voltage [v] 0246 0 2 4 6 8 10 v gs = 20v v gs = 10v
note : t j = 25 o c r ds(on) [ : ], drain-source on-resistance i d , drain current [a] 10 -1 10 0 10 1 0 100 200 300 400 500 c iss = c gs + c gd (c ds = shorted) c oss = c ds + c gd c rss = c gd * note ; 1. v gs = 0 v 2. f = 1 mhz c rss c oss c iss capacitances [pf] v ds , drain-source voltage [v] 246810 0.1 10 -25 o c 25 o c * notes : 1. v ds = 30v 2. 300us pulse test v gs , gate-source voltage [v] i d , drain current [a] 150 o c 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.1 1 10 25 o c * notes : 1. v gs = 0v 2. 300us pulse test v sd , source-drain voltage [v] i dr , reverse drain current [a] 150 o c
q?v~zy??q?v?_ra]?????qcabeq HFC2N60U typical characteristics (continued) figure 7. breakdown voltage variation vs temperature figure 8. on-resistance variation vs temperature figure 9. maximum safe operating area figure 10. maximum drain current vs case temperature figure 11. transient thermal response curve -100 -50 0 50 100 150 200 0.0 0.5 1.0 1.5 2.0 2.5 3.0
note : 1. v gs = 10 v 2. i d = 1 a r ds(on) , (normalized) drain-source on-resistance t j , junction temperature [ o c] -100 -50 0 50 100 150 200 0.8 0.9 1.0 1.1 1.2
note : 1. v gs = 0 v 2. i d = 250 p a bv dss , (normalized) drain-source breakdown voltage t j , junction temperature [ o c] t 2 t 1 p dm 10 0 10 1 10 2 10 3 10 -2 10 -1 10 0 10 1 100 ms dc 1 ms 100 p s operation in this area is limited by r ds(on) * notes : 1. t c = 25 o c 2. t j = 150 o c 3. single pulse i d , drain current [a] v ds , drain-source voltage [v] 25 50 75 100 125 150 0.0 0.5 1.0 1.5 2.0 i d , drain current [a] t c , case temperature [ o c] 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 -2 10 -1 10 0 10 1 * notes : 1. z t jc (t) = 13 o c/w max. 2. duty factor, d=t 1 /t 2 3. t jm - t c = p dm * z t jc (t) single pulse d=0.5 0.02 0.2 0.05 0.1 0.01 z t jc (t), thermal response t 1 , square wave pulse duration [sec]
q?v~zy??q?v?_ra]?????qcabeq HFC2N60U fig 12. gate charge test circuit & waveform fig 13. resistive switching test circuit & waveforms fig 14. unclamped inductive switching test circuit & waveforms e as =l l i as 2 ---- 2 1 -------------------- bv dss -- v dd bv dss v in v ds 10% 90% t d(on) t r t on t off t d(off) t f charge v gs 10v q g q gs q gd v dd v ds bv dss t p v dd i as v ds (t) i d (t) time v dd ( 0.5 rated v ds ) 10v v ds r l dut r g 3ma v gs dut v ds 300nf .
200nf 12v same type as dut 10v dut r g l i d
q?v~zy??q?v?_ra]?????qcabeq HFC2N60U fig 15. peak diode recovery dv/dt test circuit & waveforms dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i s controlled by pulse period v dd l i s 10v v gs ( driver ) i s ( dut ) v ds ( dut ) v dd body diode forward voltage drop v f i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period --------------------------
q?v~zy??q?v?_ra]?????qcabeq HFC2N60U package dimension 12max 13max 1.2 0.2 0.78 0.08 8.5max 3.8 0.2 2.5 0.2 3 0.2 1.27typ 2.3max 2.3max 2.8max 0.5 0.1 { v t x y ] g
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